Robot power design — diagnosing computer resets during motor startup

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The panel above contains two independent arithmetic exercises, with synthetic curves and A/B comparison. No equipment or local Python installation is required. The original measurement procedure below remains optional; these curves do not diagnose a particular robot.

Supply path: an ideal source feeds battery resistance, then shared wiring/contact resistance, then an imposed total current. Shared resistance includes the outgoing and return paths. Battery-terminal voltage is Vs − I Rbattery; converter-input voltage is Vs − I (Rbattery + Rshared). The imposed current starts at 2 A, rises by the selected extra current at 0 ms, and returns at 100 ms. Repeated time coordinates show the left and right limits of the ideal steps. This is an algebraic resistance model, with no inductance, battery chemistry, charge state, current limiting or motor dynamics. Converter output, computer voltage and reset thresholds are not modeled. The current is prescribed, not calculated from a regulated constant-power load.

The defaults split the article's assumed 0.12 Ω into 0.04 Ω battery and 0.08 Ω shared resistance. An extra 5 A therefore adds 0.6 V of converter-input drop. Baseline resistance losses remain present: the 7 A plateau gives 11.72 V at the battery terminals and 11.16 V at the converter input from a 12 V ideal source. Move the resistance between the two segments while keeping the total fixed: the same downstream dip can have different battery-terminal evidence. This demonstrates measurement-point dependence, not a unique real fault diagnosis.

Separate capacitor exercise: a hypothetical capacitor alone supplies a constant missing current for the selected duration. Charge-related droop is I × t / C; terminal droop during discharge is I × ESR + I × t / C. Capacitance is entered in mF (50 mF = 0.05 F = 50,000 µF), time in ms. Time zero on this plot means just after discharge begins, so nonzero ESR gives an immediate drop. The plot stops just before the current ends: recharge and the end-of-discharge ESR recovery are not simulated. Initial capacitor voltage is unspecified; the graph shows voltage change, not a remaining supply voltage. It does not assert that any selected droop is physically usable with a particular starting voltage or load.

The default 1 A, 10 ms, 50 mF and zero ESR reproduce the article's ideal 0.2 V example. Halving capacitance doubles only the charge term; adding ESR adds its own step. The capacitor is not connected to the supply-path model. Changing capacitor settings cannot improve the upper curve. No converter-loop response, ESL, inrush, ripple rating, temperature, tolerance, stability or component recommendation is included. Slider bounds are teaching choices, not equipment ratings.

The data table includes both sides of supply steps and every capacitor sample. A/B uses common axes within each panel; the panels describe different experiments and time intervals. All outputs are synthetic calculations, not measurements or successful-start evidence. Use actual component documentation and the original measurement procedure for real fault isolation.

References: Analog Devices: real-source resistance model and TI: capacitance, ESR and transient behavior, reviewed 2026-09-20. This Lab applies Ohm's law and the constant-current capacitor relation under the assumptions above; it does not reproduce either source's hardware experiment or converter design. For energy sampling, see the separate power-measurement Lab.