Inverter Circuits — Switching DC into AC

0. What this article explains

• Half-bridge and full-bridge topologies that create single- and three-phase AC from a DC link.
• How sinusoidal PWM and space-vector PWM create an average voltage.
• Control, losses, dead time, EMI, and protection in motors, PV PCS, and EVs.

1. What is an inverter?

An inverter is a power converter that rapidly switches a DC source and uses filtering or motor inductance to synthesize AC. An ideal switch only connects or disconnects a voltage; it does not directly generate a sine wave. Pulse width, switching frequency, and phase are controlled so the load sees the desired fundamental component.

2. Inputs, outputs, and topologies

Inputs include a battery, rectifier, or photovoltaic DC link V_{dc}. A single-phase full bridge uses four switches; a three-phase two-level bridge uses six. Simultaneously turning on upper and lower devices shorts the DC link, so dead time is inserted. NPC, T-type, multilevel, and modular multilevel arrangements share voltage across devices at high voltage and power.

3. PWM mathematics: define the voltage terminals first

Measured from the negative DC rail, an ideal half-bridge midpoint switches between 0 and V_{dc}. If the upper switch is on for fraction D of period T_s, the average is \bar v_{a-}=D V_{dc}. This rail-referenced voltage is different from the voltage across an AC load.

A single-phase full bridge using bipolar PWM switches the load voltage between +V_{dc} and -V_{dc}. If the positive state occupies fraction D,

The average is zero at D=0.5, positive for D>0.5, and negative for D<0.5. Choosing D(t)=[1+m\sin(\omega t)]/2 gives an average of mV_{dc}\sin(\omega t) in the linear range 0\le m\le1. Here m is the modulation index and \omega the fundamental angular frequency.

For a 48 V DC link, D=0.75 gives a 24 V period average; D=0.25 gives −24 V. The instantaneous switching output remains ±48 V. These are illustrative calculations using a switching frequency much higher than the fundamental frequency.

In three-phase systems, distinguish phase voltage from line-to-line voltage. Inductance suppresses high-frequency current ripple without removing sharp terminal-voltage transitions or common-mode current. See the circuit and modulation diagrams in Imperix's single-phase inverter note.

4. Basic architecture

Solid arrows carry power; dashed arrows carry measurements and gate commands. The PWM controller is not in the load power path.

5. Control loops and motors

In a motor drive, an outer speed or position loop commands q-axis current and an inner current loop updates PWM duty. For a surface-PM PMSM with i_d=0 and reluctance torque neglected, p is pole-pair count, \psi_f is permanent-magnet flux linkage, and i_q is q-axis current:

The torque therefore follows i_q. The relation omits saturation, resistance drop, reluctance torque, and current limits; it cannot by itself guarantee measured machine torque. At high speed, field weakening reduces back EMF. Induction motors require flux and slip-frequency estimation. Sensor resolution, current-sampling instant, and dead-time compensation determine low-speed torque ripple.

6. Loss, heat, and EMI

With a linear-overlap transition assumption, switching and conduction loss are approximated by

The estimate must be corrected with device switching waveforms, diode reverse recovery, temperature, and parasitics. Higher f_s reduces filter and motor ripple but raises loss, gate-drive power, and EMI. SiC and GaN enable speed, but parasitic-inductance overshoot, false turn-on, and creepage/clearance become strict layout requirements. T_j=T_c+P_{loss}R_{th,jc} is a first-order estimate; transient thermal impedance, coolant temperature, and short overload require verification.

7. Topology comparison

8. Difficult conditions and protection

A short circuit can destroy a switch in microseconds, so DESAT gate-driver detection, current sensors, fuses, and hardware shutdown are layered. Excessive dead time creates voltage error and low-speed torque distortion. Long motor cables create reflected surges and bearing currents. Grid connection additionally requires anti-islanding, phase lock, current harmonics, and disconnection on loss of grid. A complete design also checks precharge, isolation monitoring, and the fault energy that remains in the DC-link capacitors after a shutdown.

9. Practical choices

• EV and servo: evaluate continuous and peak current, regenerative voltage, cooling, and position sensing over the duty cycle.
• PV PCS: check MPPT range, grid voltage, power factor/reactive power, harmonics, and anti-islanding.
• UPS: prioritize transfer time, bypass, inrush current, and redundancy.
• High-frequency compact supply: layout, EMI, and insulation testing come before exploiting GaN speed.

10. Three-line recap

An inverter designs the average of switch states with PWM to synthesize AC from DC.
Motor drives close current, speed, and position loops; grid inverters close phase, current, and anti-islanding loops.
Efficiency must be verified together with dead time, heat, EMI, short-circuit interruption, and insulation.

References

• IEEE Power Electronics Society
• IEC 61800 adjustable-speed drive systems
• NREL power electronics research
• Wolfspeed SiC resources